The present invention generally relates to automated optical inspection systems, and more particularly to references used in the automated optical inspection of electrical circuits.
Electrical circuits, such as electrical circuits found on printed circuit boards, ball grid array substrates, semiconductors and other similar electrical circuits, typically are inspected during various stages of their manufacture using automated optical inspection apparatus. Automated optical inspection (xe2x80x9cAOIxe2x80x9d) conventionally is performed for one or more of the following reasons: to ensure that various elements, referred to herein as features and described hereinbelow in greater detail, that should be in an electrical circuit according to a design do indeed exist in the electrical circuit being inspected; to ensure, that the features are appropriately placed and appropriately shaped; and to ensure that undesired features are not present.
It is well known to inspect electrical circuits for the existence and placement of features by identifying features in an electrical circuit being inspected according to their morphology, determining the location of each such feature, and then matching each feature in the electrical circuit to a corresponding feature in a reference. References may be generated from a xe2x80x9cgoldenxe2x80x9d electrical circuit which is an electrical circuit that is known to be good or alternatively from computer generated data such as computer aided design (xe2x80x9cCADxe2x80x9d) data or computer aided manufacturing (xe2x80x9cCAMxe2x80x9d) data. Additionally, neighboring identical regions in an electrical circuit may be used as mutual references.
In conventional automated optical inspection systems, a global tolerance is applied to all features, or to all features of a particular morphological type. As used herein the term xe2x80x9ctolerancexe2x80x9d refers to a distance by which the respective locations of corresponding matching portions, such as matching features, in an inspection input and in a reference input may deviate from each other without the feature in the inspection input being considered defective. Thus, a feature in an electrical circuit being inspected does not have be located at the exact location as indicated by the corresponding matching feature in a reference. Rather the location of a feature in an electrical circuit being inspected may deviate from an exact location indicated by its corresponding matching feature in the reference within the limits of the tolerance. A conventional AOI system that applies a tolerance dictated by feature morphology is an Inspire(trademark) 9000 AOI system available from Orbotech Ltd. of Yavne, Israel.
In some modern electrical circuit designs not all features require the same tolerance in the sense that some features require greater precision in location than other features, even for features of the same morphological type. Degrees of precision which determine a tolerance are typically provided as part of an electrical circuit design or are input by a user. The use of a global tolerance applying to all features, or a feature morphology dictated tolerance applying to all features of the same morphological type, in an electrical circuit being inspected generally leads to an undesirably large quantity of xe2x80x9cfalse alarmxe2x80x9d defects if the tolerance is set to be too low, or to an undesirably large quantity of undetected defects if the tolerance is set to be too high.
The present invention seeks to provide an improved system and method for inspecting electrical circuits for defects.
The present invention further seeks to provide an improved method for preparing a reference for use in inspecting electrical circuits.
A general aspect of a preferred embodiment of the present invention relates to a system for automatically optically inspecting electrical circuits by matching portions of an electrical circuit being inspected to corresponding portions in a reference, wherein various tolerances are provided for the portions as a function of a characteristic thereof Preferably, the characteristic is one or more of a spatial characteristic, an optical characteristic or a suspected shape aberration. The spatial characteristic preferably is one or more of separation between two portions, a spatial location in the electrical circuit, a density of features in an electrical circuit. The optical characteristic preferably is one or more of a color, an optical characteristic associated with a material from which a feature is formed, or a level of reflectivity associated with a feature. The characteristic may be any one single characteristic, any combination of the preceding characteristics, or any combination of the preceding characteristics in further combination with a morphological characteristic of a feature.
Another aspect of a preferred embodiment of the present invention relates to a method for generating a reference to be used in the automated optical inspection of electrical circuits. Preferably the reference includes various tolerances that are applied to features in the electrical circuit as a function of a spatial characteristic, an optical characteristic, a shape aberration, any combination of the preceding characteristics, or any combination of the preceding characteristics in further combination with a morphological type associated with a feature.
Still another aspect of the present invention relates to a method for applying adaptive tolerances to references employed in the automated optical inspection of electrical circuits. An image to be used as a reference during automated optical inspection is analyzed, preferably by computer, to identify various spatial or optical characteristics of features therein. Features are classified by their characteristic, marked and saved as a reference. Prior to automatically optically inspecting an electrical circuit, tolerances are provided independently of the classification applying to features. An inspection reference is generated by merging the reference and the tolerances and by applying the tolerances as function of the characteristics.
There is thus provided in accordance with a preferred embodiment of the present invention a system for inspecting electrical circuits comprising a proximity indicator for indicating the proximity of at least a first portion of an electrical circuit to at least a second portion of an electrical circuit; circuitry, responsive to an output of said proximity indicator, for providing a tolerance output based on the proximity of said at least a first portion of an electrical circuit to said at least a second portion of an electrical circuit; and fault detection circuitry operative in response to inspection inputs representing an electrical circuit being inspected to provide an output indication of faults in said electrical circuit being inspected based at least in part on said tolerance output.
Preferably, the first portion and the second portion are in a representation of an electrical circuit of the same type as said electrical circuit being inspected. Generally, the first portion and said second portion are features in the electrical circuit, typically an open end, a pad, or a junction.
Further in accordance with a preferred embodiment of the present invention, the proximity indicator is operative to indicate the proximity between two features having a same morphological type. Alternatively, the proximity indicator is operative to indicate the proximity between two features having a different morphological type.
Additionally, in accordance with a preferred embodiment of the present invention, the tolerance is a permitted spatial separation between a feature of a reference electrical circuit and a corresponding feature of an electrical circuit being inspected.
Moreover, in accordance with a preferred embodiment of the present invention, a feature is classified as being isolated or non-isolated with reference to a spatial separation threshold between neighboring features, and the tolerance for a feature that is classified as isolated is greater than the tolerance for a first portion that is non-isolated.
Preferably, the tolerance for an isolated feature of a first morphological type is different than the tolerance for an isolated feature of a second morphological type. Alternatively, the tolerance for a non-isolated feature of a first morphological type is different than the tolerance for a non-isolated feature of a second morphological type.
Further in accordance with a preferred embodiment of the present invention, the tolerance for an isolated feature in a defined spatial region is different than the tolerance for an isolated feature outside the defined spatial region. Additionally, the tolerance for a non-isolated feature in a defined spatial region is different than the tolerance for a non-isolated feature outside the defined spatial region.
Still further in accordance with a preferred embodiment of the present invention, the tolerance for an isolated feature having a predetermined color is different than the tolerance for an isolated feature having a color other than the predetermined color. Additionally, the tolerance for a non-isolated feature having a predetermined color is different than the tolerance for a non-isolated feature having a color other than the predetermined color.
Still further in accordance with a preferred embodiment of the present invention, the tolerance for an isolated feature formed of a predetermined material is different than the tolerance for an isolated feature formed of a material other than the predetermined material. Additionally, the tolerance for a non-isolated feature formed of a predetermined material is different than the tolerance for a non-isolated feature formed of a material other than the predetermined material.
Furthermore, in accordance with a preferred embodiment of the present invention, a feature in an electrical circuit being inspected is not defective if it is separated from the location of a matching feature in the reference electrical circuit by less than the tolerance applying to an isolated feature. Additionally, a feature in an electrical circuit being inspected is not defective if the location of the feature in the electrical circuit being inspected is separated from the location of a corresponding feature in the reference electrical circuit by greater than the tolerance for a non-isolated feature, and less than the tolerance for an isolated feature, and the feature is isolated.
There is thus provided in accordance with another preferred embodiment of the present invention a system for inspecting electrical circuits comprising a tolerance indicator for providing a tolerance output based on at least one spatial characteristic of an electrical circuit; and fault detection circuitry operative in response to inspection inputs representing an electrical circuit being inspected to provide an output indication of faults in said electrical circuit being inspected based at least in part on the tolerance output.
In accordance with a preferred embodiment of the present invention, the spatial characteristic is a spatial characteristic in a reference electrical circuit of the same type as the electrical circuit being inspected. Additionally and alternatively, the spatial characteristic is a spatial location in the electrical circuit being inspected.
Further in accordance with a preferred embodiment of the present invention, the spatial characteristic is the separation between the location a first feature and the location of second feature. Preferably, the first feature and the second feature are of the same morphological type. Alternatively, the first feature and the second feature are of different morphological types.
Moreover, in accordance with a preferred embodiment of the present invention, an isolated feature is feature whose location is separated from the location of a another feature by more than a threshold value and a non-isolated feature is a feature whose location is separated from the location of another feature by less than a threshold value. Preferably a the threshold is provided as a user input.
Further in accordance with preferred embodiment of the present invention the tolerance provided for an isolated feature is greater than the tolerance provided for a non-isolated feature.
Additionally and alternatively in accordance with preferred embodiment of the present invention the spatial characteristic is the presence of the feature in a predefined spatial region in an electrical circuit. Preferably, the tolerance provided for an isolated feature inside the spatial region is different than the tolerance for an isolated feature outside the spatial region. Moreover, the tolerance provided for a non-isolated feature inside the spatial region preferably is different than the tolerance for a non-isolated feature outside the spatial region.
Still further in accordance with a preferred embodiment of the present invention, a feature in the inspection input is not-faulty if the separation between the location of the feature and the location of a corresponding feature in a reference for the electrical circuit is less than the tolerance for a non-isolated feature.
Moreover, the feature in said inspection inputs preferably is not-faulty if the separation of the location between the feature and the location of a corresponding feature in a reference for the electrical circuit is less than the tolerance for an isolated feature, and the feature is an isolated feature.
Alternatively, in accordance with a preferred embodiment of the present invention, the spatial characteristic is a density of features in the electrical circuit at least in a portion of the electrical circuit in the spatial vicinity of the feature.
There is thus provided in accordance with another preferred embodiment of the present invention system for inspecting electrical circuits comprising a tolerance indicator for providing a tolerance output based on at least one optical characteristic of a portion of an electrical circuit; and fault detection circuitry operative in response to inspection inputs representing an electrical circuit being inspected to provide an output indication of faults in said electrical circuit being inspected based at least in part on said tolerance output.
In accordance with a preferred embodiment of the present invention the optical characteristic is an optical characteristic in a reference electrical circuit of the same type as the electrical circuit being inspected. Alternatively, the optical characteristic is an optical characteristic in the electrical circuit being inspected.
Further in accordance with a preferred embodiment of the present invention, the tolerance output is assigned to a feature according to its according to its optical characteristic.
Still further in accordance with a preferred embodiment of the present invention, the optical characteristic the color of the feature. Alternatively, the optical characteristic is a function of a material from which the feature is formed. Still alternatively, the optical characteristic is the intensity of light reflected by the feature.
Further in accordance with a preferred embodiment of the present invention, a tolerance output is assigned to a portion of an electrical circuit based on the combination of one or more optical characteristics and one or more spatial characteristics associated with the portion.
There is thus provided in accordance with another preferred embodiment of the present invention a method for preparing a reference for use in inspecting electrical circuits, comprising the steps of receiving a representation of an electrical circuit to be inspected; analyzing the representation to classify a portion of the representation according to a spatial characteristic; and assigning a tolerance to the portion as a function of the spatial characteristic.
In accordance with a preferred embodiment of the present invention, the representation received is from CAM data for the electrical circuit. Alternatively, the representation received is from CAD data for the electrical circuit. Still alternatively, the representation is an image for a known good electrical circuit of the same type as the electrical circuit.
Further in accordance with a preferred embodiment of the present invention, the spatial characteristic is a separation between a first portion in the representation and a second portion in the representation. Preferably, each portion is a feature and the spatial characteristic is the spatial location of the feature in the electrical circuit.
Moreover, in accordance with a preferred embodiment of the present invention, a first tolerance is assigned to portions having a first spatial characteristic, and a second tolerance is assigned to portions having a second spatial characteristic different from the first characteristic.
There is thus provided in accordance with another preferred embodiment of the present invention a method for preparing a reference for use in inspecting electrical circuits, comprising the steps of receiving a representation of an electrical circuit to be inspected; analyzing the representation to classify a portion of the representation according to an optical characteristic; and assigning a tolerance to the portion as a function of the optical characteristic.
In accordance with a preferred embodiment of the present invention, the representation received is from CAM data for the electrical circuit. Alternatively, the representation is from CAD data for the electrical circuit. Still alternatively, the representation is an image for a known good electrical circuit of the same type as the electrical circuit.
Further in accordance with a preferred embodiment of the present invention, the portion is a feature in the electrical circuit and the optical characteristic is a color of the feature. Alternatively, the portion is a feature in the electrical circuit and the optical characteristic is the intensity of light reflected by the feature. Still alternatively, the portion is a feature in the electrical circuit and the optical characteristic is an optical characteristic associated with a material from which the feature is formed.
Still further in accordance with the present invention, a first tolerance is assigned to features having a first optical characteristic, and a second tolerance is assigned to portions having a second optical characteristic different from the first optical characteristic.
Additionally and alternatively, the first tolerance is assigned to features having a first optical characteristic and a first spatial characteristic, and a second tolerance is assigned to features have either different optical characteristic or a different spatial characteristic.